A memory circuit, which is mounted on, e.g., a printer and comprises a plurality of memory chips, a hard disk, or the like has a memory control circuit for converting memory access (write or read access to the memory) generated by a CPU into access suitable for the memory circuit, and actually making access to the memory circuit. Such memory control circuit must undergo its logical verification in design since it makes logical arithmetic operations for converting access information such as addresses and the like. As the logical verification method for the memory control circuit, the following methods are known.
(1) As shown in FIG. 8A, a CPU model 801 executes a predetermined test program to write or read data to or from a memory model 803 via a memory control circuit 802. A comparison/verification unit 804 accesses the memory model 803 via the memory control circuit 802 on the basis of access information issued by the CPU model 801 to read out data, and makes verification by comparing the readout data with data written by the CPU model 801.
(2) As shown in FIG. 8B, the CPU model 801 executes a predetermined test program to write or read data to or from the memory model 803 via the memory control circuit 802. A comparison/verification unit 805 directly reads out data from an area of the memory model 803, where data is to be written, on the basis of access information issued by the CPU model 801, and makes verification by comparing the readout data with data written by the CPU model 801.
Likewise, the CPU model 801 reads out data from an area of the memory model 803, where data is to be written by a comparison/verification unit 805 directly, and makes verification by comparing the readout data with data written by the comparison/verification unit 805.
However, in the verification method (1), both the CPU model 801 and comparison/verification unit 804 access the memory model 803 via the identical memory control circuit 802. For this reason, even when data is written in or read out from an illegal area of the memory model 803 by access from the CPU model 801, data written by the CPU model 801 matches data read out by the comparison/verification unit 804, and such illegal read/write access cannot be verified.
According to the verification method (2), when data is written in or read out from only an illegal area of the memory model 803, such illegal access can be verified. However, when data is simultaneously written in both legal and illegal areas of the memory model 803, such access cannot be verified. This is because the comparison/verification unit 805 can only verify data in a legal area. Multiple accesses to a legal area cannot be verified, either. Note that multiple accesses are a bug that accesses a memory a plurality of times although access is required only once. In such multiple accesses, since read and write data remain the same, verification will succeed, but the memory performance deteriorates due to wasteful accesses.
That is, in the conventional verification methods, since a result written in the memory model 803 is merely read out and verified, a satisfactory verification result cannot be obtained, as described above. In either verification method (1) or (2), a series of operations such as write, read, and comparison with respect to the memory model 803 are required, resulting in poor verification efficiency.